Institutsseminar/2023-05-05

Aus SDQ-Institutsseminar
Termin (Alle Termine)
Datum Freitag, 5. Mai 2023
Uhrzeit 11:30 – 13:15 Uhr (Dauer: 105 min)
Ort Raum 348 (Gebäude 50.34)
Webkonferenz https://sdq.kastel.kit.edu/wiki/SDQ-Oberseminar/Microsoft Teams
Vorheriger Termin Fr 28. April 2023
Nächster Termin Fr 12. Mai 2023
Die Dauer dieses Termins beträgt derzeit 105 Minuten. Bitte ggf. einen weiteren Raum reservieren und den Termin auf zwei Räume aufteilen. Dazu unter Termine eine zusätzliche Terminseite anlegen und die Vorträge neu zuweisen.

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Vorträge

Vortragende(r) Lukas Burgey
Titel Continuous Integration of Performance Models for Lua-Based Sensor Applications
Vortragstyp Masterarbeit
Betreuer(in) Manar Mazkatli
Vortragsmodus in Präsenz
Kurzfassung Architecture-level performance models of software like the PCM can aid with the development of the software by preventing architecture degradation and helping to diagnose performance issues during the implementation phase.

Previously, manual intervention was required to create and update such models. The CIPM approach can be employed to automatically make a calibrated PCM instance available during the development of software. A prototypical implementation of the CIPM approach targets microservice-based web applications implemented in Java. No implementations for other programming languages exist and the process of adapting the CIPM approach to support another programming language has previously not been explored.

We present an approach to adapting CIPM to support Lua-based sensor applications. A prototypical implementation of the adapted approach was evaluated using real-world Lua-based sensor applications from the SICK AppSpace ecosystem. The evaluation demonstrates the feasibility of the adapted approach, but also reveals minor technical issues with the implementation.

Vortragende(r) Moritz Brödel
Titel Preventing Automatic Code Plagiarism Generation Through Token String Normalization
Vortragstyp Bachelorarbeit
Betreuer(in) Timur Sağlam
Vortragsmodus in Präsenz
Kurzfassung Code plagiarism is a significant problem in computer science education. Token-based plagiarism detectors, which represent the state-of-the-art in code plagiarism detection, excel at identifying manually plagiarized submissions. Unfortunately, they are vulnerable to automatic plagiarism generation, particularly when statements are inserted or reordered. Therefore, this thesis introduces token string normalization, which makes the results of token-based plagiarism detectors invariant to statement insertion and reordering. It inher- its token-based plagiarism detectors’ high language independence and utilizes a program graph. We integrate token string normalization into the state-of-the-art token-based plagiarism detector JPlag. We show that this prevents automatic plagiarism generation using statement insertion and reordering. Additionally, we confirm that JPlag’s existing capabilities are retained.
Vortragende(r) Alp Toraç Genç
Titel Prototypical implementation of discrete-event-based co-simulation of hardware and software
Vortragstyp Bachelorarbeit
Betreuer(in) Sebastian Weber
Vortragsmodus in Präsenz
Kurzfassung Computer-supported simulations provide multiple ways to analyse design decisions and avoid many possible mistakes. For simulating large and complex systems, multiple simulation tools may be necessary, as having the means to simulate in only one tool may not be the best approach. In such cases, co-simulation can be used to simulate the said system by interconnecting the mentioned simulation tools using a co-simulation standard. A system that consists of hardware and software falls under this category of systems.

Depending on how a system is to be co-simulated, choosing a co-simulation standard can be challenging, as there are many factors and trade-offs to consider. In this thesis, existing co-simulation standards with discrete-event-based co-simulation support will be researched and compared to one another. This comparison will then be used to choose a co-simulation standard for an exemplary case of hardware-software co-simulation, which will be prototypically implemented and evaluated.

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