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| hardware - UML-Dokumentation |
deployment::hardware
KlasseProcessorDescriptor
The ProcessorDescriptor entity describes the properties of a physical processor. This includes the execution cores, caches and cache hierarchy, and sharing of caches among execution cores. It does not, however, represent a physical instance of a processor installed on a Node in target environment. Note that clock frequency is not part of this description, rather it is an attribute of Processor instance installed on a node.
| Attribute |
| <Class> Cache | caches |
A collection of memory caches the processor is equipped with. Simpler processor for embedded devices may actually have no cache.
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| <Class> TLB | tlbs |
Translation Lookaside Buffers the processor is equipped with. Simple processors for embedded devices without virtual memory support will typically have no TLBs.
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| <Class> ProcessorCore | cores |
Lists processor cores of a particular processor. Each processor must have at least one processor core.
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Eigenschaften:
| Alias | |
| Classifier Behavior | |
| Is Abstract | false |
| Is Active | false |
| Is Leaf | false |
| Keywords | |
| Name | ProcessorDescriptor |
| Name Expression | |
| Namespace | <<ePackage>> <Package> hardware |
| Owned Template Signature | |
| Owner | <<ePackage>> <Package> hardware |
| Owning Template Parameter | |
| Package | <<ePackage>> <Package> hardware |
| Qualified Name | samm::deployment::hardware::ProcessorDescriptor |
| Representation | |
| Stereotype | |
| Template Parameter | |
| Visibility | Public |
caches
Public <Class> Cache caches
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A collection of memory caches the processor is equipped with. Simpler processor for embedded devices may actually have no cache.
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Eigenschaften:
-
| Aggregation | Composite |
| Alias | |
| Association | <Association> A_caches_processorDescriptor |
| Association End | |
| Class | <Class> ProcessorDescriptor |
| Datatype | |
| Default | |
| Default Value | |
| Is Composite | true |
| Is Derived | false |
| Is Derived Union | false |
| Is Leaf | false |
| Is Ordered | false |
| Is Read Only | false |
| Is Static | false |
| Is Unique | true |
| Keywords | |
| Lower | 0 |
| Lower Value | <Literal Integer> 0 |
| Multiplicity | * |
| Name | caches |
| Name Expression | |
| Namespace | <Class> ProcessorDescriptor |
| Opposite | |
| Owned Template Signature | |
| Owner | <Class> ProcessorDescriptor |
| Owning Association | |
| Owning Template Parameter | |
| Qualified Name | samm::deployment::hardware::ProcessorDescriptor::caches |
| Stereotype | |
| Template Parameter | |
| Type | <Class> Cache |
| Upper | * |
| Upper Value | <Literal Unlimited Natural> * |
| Visibility | Public |
cores
Public <Class> ProcessorCore cores
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Lists processor cores of a particular processor. Each processor must have at least one processor core.
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Eigenschaften:
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| Aggregation | Composite |
| Alias | |
| Association | <Association> A_cores_descriptor |
| Association End | |
| Class | <Class> ProcessorDescriptor |
| Datatype | |
| Default | |
| Default Value | |
| Is Composite | true |
| Is Derived | false |
| Is Derived Union | false |
| Is Leaf | false |
| Is Ordered | false |
| Is Read Only | false |
| Is Static | false |
| Is Unique | true |
| Keywords | |
| Lower | 1 |
| Lower Value | <Literal Integer> 1 |
| Multiplicity | 1..* |
| Name | cores |
| Name Expression | |
| Namespace | <Class> ProcessorDescriptor |
| Opposite | <Property> descriptor : ProcessorDescriptor |
| Owned Template Signature | |
| Owner | <Class> ProcessorDescriptor |
| Owning Association | |
| Owning Template Parameter | |
| Qualified Name | samm::deployment::hardware::ProcessorDescriptor::cores |
| Stereotype | |
| Template Parameter | |
| Type | <Class> ProcessorCore |
| Upper | * |
| Upper Value | <Literal Unlimited Natural> * |
| Visibility | Public |
tlbs
Public <Class> TLB tlbs
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Translation Lookaside Buffers the processor is equipped with. Simple processors for embedded devices without virtual memory support will typically have no TLBs.
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Eigenschaften:
-
| Aggregation | Composite |
| Alias | |
| Association | <Association> A_tlbs_processorDescriptor |
| Association End | |
| Class | <Class> ProcessorDescriptor |
| Datatype | |
| Default | |
| Default Value | |
| Is Composite | true |
| Is Derived | false |
| Is Derived Union | false |
| Is Leaf | false |
| Is Ordered | false |
| Is Read Only | false |
| Is Static | false |
| Is Unique | true |
| Keywords | |
| Lower | 0 |
| Lower Value | <Literal Integer> 0 |
| Multiplicity | * |
| Name | tlbs |
| Name Expression | |
| Namespace | <Class> ProcessorDescriptor |
| Opposite | |
| Owned Template Signature | |
| Owner | <Class> ProcessorDescriptor |
| Owning Association | |
| Owning Template Parameter | |
| Qualified Name | samm::deployment::hardware::ProcessorDescriptor::tlbs |
| Stereotype | |
| Template Parameter | |
| Type | <Class> TLB |
| Upper | * |
| Upper Value | <Literal Unlimited Natural> * |
| Visibility | Public |
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| hardware - UML-Dokumentation |